Milan Area, Italy
ASIC/FPGA Digital Designer, SMTS at Maxim Integrated
Semiconductors
Education
Università di Pisa 1995 — 2001
Master's Degree, Electronic Engineering, Summa cum Laude
ITIS "A. Meucci" - Casarano 1990 — 1995
Perito Capotecnico, Telecomunicazioni (progetto Ambra), 60/60
Experience
Maxim Integrated March 2012 - Present
Skytechnology SRL December 2010 - March 2012
Alcatel-Lucent December 2010 - March 2012
STMicroelectronics September 2003 - December 2010
austriamicrosystems 2001 - 2003
Skills
C++, Static Timing Analysis, Teamwork, Analog, Simulation, EDA, RTL coding, NI LabVIEW, Verilog, Testing, Circuit Design, C, Perl, Hardware, ModelSim, Coaching, Matlab, Embedded Systems, DSP, Debugging, DFT, VHDL, ARM, ASIC, NCSim, Simulink, Xilinx, Microcontrollers, TCL, Functional Verification, Assembly, Integration, Digital Design, Hardware Design, SoC, Mixed Signal, RF, Firmware, Programming, RTL design, Integrated Circuit..., CMOS, Semiconductors, Electronics, Linux, FPGA, Analog Circuit Design, IC, Team Building, Python